_Cla1Prog_Start = _Cla1funcsRunStart;

/* 
 * Define a size for the CLA scratchpad area that will be used
 * by the CLA compiler for local symbols and temps
 * Also force references to the special symbols that mark the
 * scratchpad are.
 */
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start


/* 
 * Define the memory block start/length for the F2806x
 * PAGE 0 will be used to organize program sections
 * PAGE 1 will be used to organize data sections
 *
 * Notes:
 *       Memory blocks on F28069 are uniform (ie same
 *       physical memory) in both PAGE 0 and PAGE 1.
 *       That is the same memory region should not be
 *       defined for both PAGE 0 and PAGE 1.
 *       Doing so will result in corruption of program
 *       and/or data.
 *
 *       Contiguous SARAM memory blocks can be combined
 *       if required to create a larger memory block.
 */
MEMORY
{
PAGE 0 :   /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
    RAM_M0              : origin = 0x000050, length = 0x0003B0     /* on-chip RAM block M0 */
    CLA1_PRAM           : origin = 0x009000, length = 0x001000	   /* on-chip RAM block L3: CLA Program RAM */
    RAM_L7L8			: origin = 0x010000, length = 0x004000	   /* on-chip RAM block L7-L8: RAM functions */
    OTP                 : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */
    FLASH_H             : origin = 0x3D8000, length = 0x004000     /* on-chip FLASH */
    FLASH_G             : origin = 0x3DC000, length = 0x004000     /* on-chip FLASH */
    FLASH_F             : origin = 0x3E0000, length = 0x004000     /* on-chip FLASH */
    FLASH_E             : origin = 0x3E4000, length = 0x004000     /* on-chip FLASH */ 
    FLASH_D             : origin = 0x3E8000, length = 0x004000     /* on-chip FLASH */
    FLASH_C             : origin = 0x3EC000, length = 0x004000     /* on-chip FLASH */
//  FLASH_B             : origin = 0x3F0000, length = 0x004000     /* on-chip FLASH */
    FLASH_A             : origin = 0x3F4000, length = 0x003F80     /* on-chip FLASH */
    CSM_RSVD            : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
    BEGIN               : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
    CSM_PWL_P0          : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password location */

    FPUTABLES           : origin = 0x3FD860, length = 0x0006A0	   /* FPU Math Tables in Boot ROM */
    IQTABLES            : origin = 0x3FDF00, length = 0x000B50     /* IQ Math Tables in Boot ROM */
    IQTABLES2           : origin = 0x3FEA50, length = 0x00008C     /* IQ Math Tables in Boot ROM */
    IQTABLES3           : origin = 0x3FEADC, length = 0x0000AA	   /* IQ Math Tables in Boot ROM */

    ROM                 : origin = 0x3FF3B0, length = 0x000C10     /* Bootloader Functions */
    RESET               : origin = 0x3FFFC0, length = 0x000002     /* RESET Vector  */
    VECTORS             : origin = 0x3FFFC2, length = 0x00003E     /* CPU Vector Table  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */

    BOOT_RSVD           : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
    RAM_M1              : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
    CLA1_MSGRAMLOW      : origin = 0x001480, length = 0x000080	   /* CLA-to-CPU Message RAM */
    CLA1_MSGRAMHIGH     : origin = 0x001500, length = 0x000080     /* CPU-to-CLA Message RAM */
    CLA1_DRAM           : origin = 0x008000, length = 0x001000
//  CLA1_DRAM2          : origin = 0x008000, length = 0x000800     /* on-chip RAM block L0 : CLA Data RAM 2 */
//  CLA1_DRAM0          : origin = 0x008800, length = 0x000400     /* on-chip RAM block L1 : CLA Data RAM 0 */
//  CLA1_DRAM1          : origin = 0x008C00, length = 0x000400     /* on-chip RAM block L2 : CLA Data RAM 1 */
//  RAM_L0              : origin = 0x008000, length = 0x000800     /* on-chip RAM block L0 */
//  RAM_L1              : origin = 0x008800, length = 0x000400     /* on-chip RAM block L1 */
//  RAM_L2              : origin = 0x008C00, length = 0x000400     /* on-chip RAM block L2 */
//  RAM_L3              : origin = 0x009000, length = 0x001000	   /* on-chip RAM block L3 */
    RAM_L4              : origin = 0x00A000, length = 0x002000     /* on-chip RAM block L4 */
    RAM_L5              : origin = 0x00C000, length = 0x002000     /* on-chip RAM block L5 */
    RAM_L6              : origin = 0x00E000, length = 0x002000     /* on-chip RAM block L6 */
//  RAM_L7              : origin = 0x010000, length = 0x002000     /* on-chip RAM block L7 */
//  RAM_L8              : origin = 0x012000, length = 0x002000     /* on-chip RAM block L8 */
    FLASH_B             : origin = 0x3F0000, length = 0x004000     /* on-chip FLASH        */
    USB_RAM             : origin = 0x040000, length = 0x000800     /* USB RAM		       */
}


/* Allocate sections to memory blocks.
 * Note:
 *   codestart - user defined section in DSP28_CodeStartBranch.asm used to redirect code
 *               execution when booting to flash
 *   ramfuncs  - user defined section to store functions that will be copied from Flash into RAM
 */
SECTIONS
{
    /* Allocate program areas: */
    .cinit              : > FLASH_A,     PAGE = 0
    .pinit              : > FLASH_A,     PAGE = 0
    .text               : > FLASH_C,     PAGE = 0
    codestart           : > BEGIN,       PAGE = 0
    ramfuncs            : LOAD = FLASH_E,
                          RUN = RAM_L7L8,
                          LOAD_START(_RamfuncsLoadStart),
                          LOAD_END(_RamfuncsLoadEnd),
                          RUN_START(_RamfuncsRunStart),
                          LOAD_SIZE(_RamfuncsLoadSize),
                          PAGE = 0

    /* Allocate CSM areas: */
    csmpasswds          : > CSM_PWL_P0,  PAGE = 0
    csm_rsvd            : > CSM_RSVD,    PAGE = 0

    /* Allocate uninitalized data sections: */
    .stack              : > RAM_M1,      PAGE = 1
    .cio                : > RAM_L4,      PAGE = 1
    .sysmem             : > RAM_M1,      PAGE = 1   
    .ebss               : > RAM_L4,      PAGE = 1
    .esysmem            : > RAM_L4,      PAGE = 1

    /* Initalized sections to go in Flash */
    /* For SDFlash to program these, they must be allocated to page 0 */
    .econst             : > FLASH_A,     PAGE = 0
    .switch             : > FLASH_A,     PAGE = 0

    /* Allocate IQ math areas: */
    IQmath              : > FLASH_A,     PAGE = 0            /* Math Code */
    IQmathTables        : > IQTABLES,    PAGE = 0, TYPE = NOLOAD

    /* Allocate FPU math areas: */
    FPUmathTables       : > FPUTABLES,   PAGE = 0, TYPE = NOLOAD
   
    /* Allocate CLA areas: */
    Cla1ToCpuMsgRAM     : > CLA1_MSGRAMLOW,   PAGE = 1  
    CpuToCla1MsgRAM     : > CLA1_MSGRAMHIGH,  PAGE = 1
    Cla1DataRam0        : > CLA1_DRAM,		  PAGE = 1
//  Cla1DataRam1		: > CLA1_DRAM,		  PAGE = 1
//  Cla1DataRam2        : > CLA1_DRAM,        PAGE = 1

    Cla1Prog            : LOAD = FLASH_D,
                          RUN  = CLA1_PRAM,
                          LOAD_START(_Cla1funcsLoadStart),
                          LOAD_END(_Cla1funcsLoadEnd),
                          RUN_START(_Cla1funcsRunStart),
                          LOAD_SIZE(_Cla1funcsLoadSize),
                          PAGE = 0

    CLA1mathTables      : LOAD = FLASH_B,
                          RUN  = CLA1_DRAM,
                          LOAD_START(_Cla1mathTablesLoadStart),
                          LOAD_END(_Cla1mathTablesLoadEnd),
                          RUN_START(_Cla1mathTablesRunStart),
                          LOAD_SIZE(_Cla1mathTablesLoadSize),
                          PAGE = 1

    CLAscratch          : 
                          { *.obj(CLAscratch)
                          . += CLA_SCRATCHPAD_SIZE;
                          *.obj(CLAscratch_end) } > CLA1_DRAM,
                          PAGE = 1

    .bss_cla            : > CLA1_DRAM,  PAGE = 1
    .const_cla          : > CLA1_DRAM,  PAGE = 1

    /* Allocate DMA areas: */
    /*
    DMARAML5            : > RAM_L5,     PAGE = 1
    DMARAML6	        : > RAM_L6,     PAGE = 1
    DMARAML7	        : > RAM_L7,     PAGE = 1
    DMARAML8	        : > RAM_L8,     PAGE = 1
    */

    /* Uncomment the section below if calling the IQNexp() or IQexp()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
    */
    /*
    IQmathTables2       : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
    {
              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
    }
    */

    /* Uncomment the section below if calling the IQNasin() or IQasin()
       functions from the IQMath.lib library in order to utilize the
       relevant IQ Math table in Boot ROM (This saves space and Boot ROM
       is 1 wait-state). If this section is not uncommented, IQmathTables2
       will be loaded into other memory (SARAM, Flash, etc.) and will take
       up space, but 0 wait-state is possible.
    */
    /*
    IQmathTables3       : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
    {

               IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

    }
    */

    /* 
     * .reset is a standard section used by the compiler.  
     * It contains the address of the start of _c_int00 for C Code.
     * When using the boot ROM this section and the CPU vector
     * table is not needed.  Thus the default type is set here to DSECT.
     */
    .reset              : > RESET,      PAGE = 0, TYPE = DSECT
    vectors             : > VECTORS,    PAGE = 0, TYPE = DSECT

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

